Publications about Formal Verification of Real-Time Systems

(All PublicationsIndex)

Books and proceedings

  1. Dirk Beyer.
    Formale Verifikation von Realzeit-Systemen mittels Cottbus Timed Automata.
    Mensch & Buch Verlag, Berlin, 2002.
    Also: Dissertation, Brandenburgische Technische Universität Cottbus, 2002.
    [ Info ] [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    ISBN: 3-89820-450-2
    BTU version: Dissertation
    Also as abstract: Softwaretechnik-Trends, Gesellschaft für Informatik, Berlin, 23(2):4, May 2003. (ISSN 0720-8928)
    Dissertation, describes all important concepts and details of the Rabbit project in German.
    [bibtex-entry]

Articles in conference or workshop proceedings

  1. Dirk Beyer, Claus Lewerentz, and Andreas Noack.
    Rabbit: A Tool for BDD-Based Verification of Real-Time Systems.
    In W. A. Hunt and F. Somenzi, editors, Proceedings of the 15th International Conference on Computer Aided Verification (CAV 2003, Boulder, CO, July 8-12), LNCS 2725, pages 122-125, 2003.
    Springer-Verlag, Heidelberg.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    CAV 2003, Boulder, CO, July 8-12,
    Warren A. Hunt Jr., Fabio Somenzi, editors.
    © 2006 Springer-Verlag
    Online: http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=2725&spage=122
    A description of the BDD-based tool's main features.
    [bibtex-entry]

  2. Dirk Beyer and Andreas Noack.
    Can Decision Diagrams Overcome State Space Explosion in Real-Time Verification?.
    In H. König, M. Heiner, and A. Wolisz, editors, Proceedings of the 23rd IFIP International Conference on Formal Techniques for Networked and Distributed Systems (FORTE 2003, Berlin, September 29 - October 2), LNCS 2767, pages 193-208, 2003.
    Springer-Verlag, Heidelberg.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FORTE 2003, Berlin, September 29 - October 2
    Hartmut König, Monika Heiner, Adam Wolisz, editors.
    © 2006 Springer-Verlag
    Online: http://dx.doi.org/10.1007/11965
    Analysis of the efficiency of binary decision diagrams (BDDs) and clock difference diagrams (CDDs) in the verification of timed automata. Analytical and empirical complexity results for three communication protocols.
    [bibtex-entry]

  3. Dirk Beyer.
    Efficient Reachability Analysis and Refinement Checking of Timed Automata using BDDs.
    In T. Margaria and T. F. Melham, editors, Proceedings of the 11th IFIP Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME 2001, Livingston, September 4-7), LNCS 2144, pages 86-91, 2001.
    Springer-Verlag, Heidelberg.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    CHARME 2001, Livingston, September 4-7,
    Tiziana Margaria, Tom Melham, editors.
    © 2006 Springer-Verlag
    Online: http://link.springer.de/link/service/series/0558/bibs/2144/21440086.htm
    Decribes how the tool checks refinement via simulation relation.
    [bibtex-entry]

  4. Dirk Beyer.
    Improvements in BDD-Based Reachability Analysis of Timed Automata.
    In J. N. Oliveira and P. Zave, editors, Proceedings of the Tenth International Symposium of Formal Methods Europe (FME 2001, Berlin, March 12-16): Formal Methods for Increasing Software Productivity, LNCS 2021, pages 318-343, 2001.
    Springer-Verlag, Heidelberg.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FME 2001, Berlin, March 12-16,
    Jose Nuno Oliveira, Pamela Zave, editors.
    © 2006 Springer-Verlag
    Online: http://link.springer.de/link/service/series/0558/bibs/2021/20210318.htm
    Discretization of Timed Automata, BDD-based representation, proof of an upper bound for the BDD of the transition relation, BDD variable ordering, heuristics for efficient verification, contains the proof of the equivalence of our integer semantics to the continuous semantics regarding reachable locations.
    [bibtex-entry]

  5. Dirk Beyer.
    Rabbit: Verification of Real-Time Systems.
    In P. Pettersson and S. Yovine, editors, Proceedings of the Workshop on Real-Time Tools (RT-TOOLS 2001, Aalborg, August 20), Uppsala, pages 13-21, 2001.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    RT-TOOLS 2001, Aalborg, August 20
    Paul Pettersson, Sergio Yovine, editors
    [bibtex-entry]

  6. Dirk Beyer and Andy Heinig.
    Different Strategies for BDD-Based Reachability Analysis of Timed Automata.
    In C. Rattray, M. Sveda, and J. Rozenblit, editors, Proceedings of the Second IEEE/IFIP Joint Workshop on Formal Specifications of Computer-Based Systems (FSCBS 2001, Washington, D.C., April 20), Stirling, pages 89-98, 2001.
    Keyword(s): Formal Verification of Real-Time Systems.
    FSCBS 2001, Washington, D.C., April 20
    Charles Rattray, Miroslav Sveda, Jerzy Rozenblit, editors
    [bibtex-entry]

  7. Dirk Beyer and Andreas Noack.
    Efficient Verification of Timed Automata using BDDs.
    In S. Gnesi and U. Ultes-Nitsche, editors, Proceedings of the Sixth International ERCIM Workshop on Formal Methods for Industrial Critical Systems (FMICS 2001, Paris, July 16-17), pages 95-113, 2001.
    INRIA, Paris.
    [ PDF ] [ PS ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FMICS 2001, Paris, July 16-17
    Stefania Gnesi, Ulrich Ultes-Nitsche, editors
    [bibtex-entry]

  8. Dirk Beyer and Heinrich Rust.
    Cottbus Timed Automata: Formal Definition and Semantics.
    In C. Rattray, M. Sveda, and J. Rozenblit, editors, Proceedings of the Second IEEE/IFIP Joint Workshop on Formal Specifications of Computer-Based Systems (FSCBS 2001, Washington, D.C., April 20), Stirling, pages 75-87, 2001.
    [ PDF ] [ PS ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FSCBS 2001, Washington, D.C., April 20
    Charles Rattray, Miroslav Sveda, Jerzy Rozenblit, editors
    The pdf is a revised version of the original paper.
    The full formal definition and semantics of CTA.
    [bibtex-entry]

  9. Dirk Beyer, Claus Lewerentz, and Heinrich Rust.
    Modelling and Analysing a Railroad Crossing in a Modular Way.
    In S. Gnesi, I. Schieferdecker, and A. Rennoch, editors, Proceedings of the Fifth International ERCIM Workshop on Formal Methods for Industrial Critical Systems (FMICS 2000, Berlin, April 3-4), Berlin, pages 287-303, 2000.
    [ PDF ] [ PS ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FMICS 2000, Berlin, April 3-4
    Stefania Gnesi, Ina Schieferdecker, Axel Rennoch, editors
    Describes a case study for modeling and analysis using the DDM-based representation.
    [bibtex-entry]

  10. Dirk Beyer and Andreas Noack.
    BDD-basierte Verifikation von Realzeit-Systemen.
    In J. Grabowski and S. Heymer, editors, Tagungsband Formale Beschreibungstechniken für verteilte Systeme (FBT 2000, Lübeck, June 22-23), pages 79-89, 2000.
    Shaker Verlag, Aachen.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FBT 2000, Lübeck, June 22-23
    Jens Grabowski, Stefan Heymer, editors
    [bibtex-entry]

  11. Dirk Beyer and Heinrich Rust.
    A Tool for Modular Modelling and Verification of Hybrid Systems.
    In A. Crespo and J. Vila, editors, Proceedings of the 25th IFAC/IFIP Workshop on Real-Time Programming (WRTP 2000, Palma, May 17-19), pages 169-174, 2000.
    Elsevier Science, Oxford.
    Keyword(s): Formal Verification of Real-Time Systems.
    WRTP 2000, Palma, May 17-19
    Alfons Crespo, Joan Vila, editors
    Also as preprint: Proc. WRTP'00, pages 181-186, Valencia, 2000.
    The reference for the first version of the tool using the double decription method (DDM) for hybrid systems.
    [bibtex-entry]

  12. Dirk Beyer and Heinrich Rust.
    Modular Modelling and Verification with Cottbus Timed Automata.
    In C. Rattray and M. Sveda, editors, Proceedings of the IEEE/IFIP Joint Workshop on Formal Specifications of Computer-Based Systems (FSCBS 2000, Edinburgh, April 6-7), Stirling, pages 17-24, 2000.
    Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FSCBS 2000, Edinburgh, April 6-7
    Charles Rattray, Miroslav Sveda, editors
    [bibtex-entry]

  13. Dirk Beyer and Heinrich Rust.
    Concepts of Cottbus Timed Automata.
    In K. Spies and B. Schätz, editors, Tagungsband Formale Beschreibungstechniken für verteilte Systeme (FBT 1999, München, June 17-18), pages 27-34, 1999.
    Herbert Utz Verlag, München.
    [ PDF ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FBT 1999, München, June 17-18
    Katharina Spies and Bernhard Schätz, editors
    [bibtex-entry]

  14. Dirk Beyer and Heinrich Rust.
    Modeling a Production Cell as a Distributed Real-Time System with Cottbus Timed Automata.
    In H. König and P. Langendörfer, editors, Tagungsband Formale Beschreibungstechniken für verteilte Systeme (FBT 1998, Cottbus, June 4-5), pages 148-159, 1998.
    Shaker Verlag, Aachen.
    [ PDF ] [ PS ] Keyword(s): Formal Verification of Real-Time Systems.
    [Abstract]
    FBT 1998, Cottbus, June 4-5
    Hartmut König, Peter Langendörfer, editors
    The first published paper where we introduce the concepts of Cottbus Timed Automata, i.e. modules, interfaces and a modeling example.
    [bibtex-entry]

Internal reports

  1. Dirk Beyer and Andreas Noack.
    A Comparative Study of Decision Diagrams for Real-Time Verification.
    Technical report I-03/2003, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, January 2003.
    Keyword(s): Formal Verification of Real-Time Systems.
    See FORTE03 [26] for proceedings version.
    [bibtex-entry]

  2. Dirk Beyer.
    Rabbit: Verification of Real-Time Systems.
    Technical report I-05/2001, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, March 2001.
    Keyword(s): Formal Verification of Real-Time Systems.
    See CAV03 [25] for proceedings version.
    [bibtex-entry]

  3. Dirk Beyer.
    Reachability Analysis and Refinement Checking for BDD-Based Model Checking of Timed Automata.
    Technical report I-04/2001, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, February 2001.
    Keyword(s): Formal Verification of Real-Time Systems.
    See CHARME01 [20] for proceedings version.
    [bibtex-entry]

  4. Dirk Beyer and Andreas Noack.
    Efficient Verification of Real-Time Systems using BDDs.
    Technical report I-13/2000, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, December 2000.
    Keyword(s): Formal Verification of Real-Time Systems.
    See FMICS01 [18] for proceedings version.
    [bibtex-entry]

  5. Dirk Beyer and Heinrich Rust.
    A Formalism for Modular Modelling of Hybrid Systems.
    Technical report I-10/1999, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, October 1999.
    Keyword(s): Formal Verification of Real-Time Systems.
    See FSCBS01 [16] for proceedings version.
    [bibtex-entry]

  6. Dirk Beyer and Heinrich Rust.
    A Modular Hybrid Modelling Notation.
    Technical report I-03/1999, Institute of Computer Science, Brandenburgische Technische Universität Cottbus, February 1999.
    Keyword(s): Formal Verification of Real-Time Systems.
    See TR10-BTU99 [04] for revised version.
    [bibtex-entry]

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